1. Field of the Invention
The present invention relates to a current sense amplifier for low voltage applications with direct sensing on the bitline of a memory matrix and, more in particular, to an amplifier of the above type and incorporated into a memory electronic device.
2. Description of the Related Art
As it is well known in this specific technical field, the conventional architecture of a sense amplifier is critical for power supply references lower than 1.8V.
In the herewith attached FIG. 1, the structure of a sense amplifier of the known type is schematically shown, for example as described by G. Campardo, M. Dallabora, D. Novosel: “L'amplificatore di lettura nei dispositivi di memoria EPROM”, Alta Frequenza, July-August 1988, which comprises a differential amplifier having inputs associated with respective MATSIDE and REFSIDE legs connected to a cell of the memory matrix and to a reference cell.
It is to be noted that, in the sense amplifier operation, the voltage requested to bias the drain terminal of the matrix cell to be sensed, also indicated with node BL of FIG. 1, does not scale down significantly when the power supply reference scales down.
During the sensing step, the biasing voltage values of the bitline vary between 0.6V and 0.9V. This reduces the dynamics of the MATSIDE node to a voltage between the bitline voltage, which has little variability with the technology evolution, and the supply voltage Vdd, which is likely to decrease in the near future.
A possible solution to this problem is described in the European patent application published under no. 1 426 965, inventors F. De Santis and M. Pasotti, entitled: “Folded Sensing Low Voltage Application.”
Although advantageous under several aspects, this approach, however, exhibits some disadvantages. For example the sense amplifier described in the above patent application uses a fed back operational amplifier and a PMOS transistor to bias the bitline while sensing.
However this solution is less efficient than the traditional cascode of FIG. 1 since it penalizes the access time.
Moreover, the sensing circuitry is forced to work under the bitline biasing voltage.
Other alternative solutions provide the use of boosted voltages in the sensing circuitry, raising further problems of noise immunity while sensing, besides requiring additional circuit portions with charge pump.
The technical problem is that of maintaining a quick access time during the sensing step and thus overcoming the limits of the prior circuits.